1. Field of the Invention
The present invention generally relates to a semiconductor light-receiving device, and more particularly, to a PIN photodiode that can perform high-speed operations and can be used in large-capacity optical fiber communication systems.
2. Description of the Related Art
As optical communication systems have been rapidly increasing in capacity, high-speed transmission systems with 40 bps or higher, for example, have been developed in recent years. Semiconductor light-receiving devices to be used in such large-capacity transmission systems need to be capable of operating at high-speed of 40 GHz or higher, and therefore, need to exhibit higher performance and higher reliability than conventional semiconductor light-receiving devices.
Japanese Unexamined Patent Publication No. 2001-127333 discloses this type of semiconductor light-receiving device in the form of a PIN photodiode having a tapered optical waveguide structure integrated therein. FIG. 7 is a perspective view of an example structure of the PIN photodiode. In the circle denoted by A in FIG. 7, an enlarged section view of the light receiving unit of the photodiode is shown. As can be seen from FIG. 7, the photodiode 100 has a tapered optical waveguide structure 102 connected to a side surface of a light receiving element 103 over a semi-insulating InP substrate 101. The tapered optical waveguide structure 102 converts the size of light transmitted from optical fibers into a spot size, and then sends the converted light into the light receiving element 103 through a side surface of a light absorption layer 104.
A p-side electrode pad 105 of a predetermined shape is provided on the substrate 101, with an insulating film being interposed in between. Also, n-side electrode pads 106 are provided on the same plane as the p-side electrode pad 105. Accordingly, this photodiode 100 can be connected directly to a substrate of a coplanar strip line substrate. A p-type electrode 107 is formed on top of the light receiving element 103. The p-type electrode 107 is connected to the p-side electrode pad 105 by an air bridge 107a. 
An n-type electrode 108 is formed on the surface of an n-type semiconductor layer 109 that is exposed by etching performed on the light receiving element 103 to form a mesa structure. The n-type electrode 108 is connected to the n-side electrode pads 106 extending onto the semiconductor layer 109. The n-side electrode pads 106 occupy large areas to secure a connection region for a bypass capacitor (later described) and to securely provide a ground potential to the n-type electrode 108 in high-frequency operations.
However, in a photodiode having a smaller p-i-n junction area (in the capacity range of 20 fF to 90 fF or lower, for example) than a conventional chip to perform operations at high speeds (about 40 GHz, for example), even a very small noise pulse can cause a high voltage between electrodes, resulting in deterioration of the device. To avoid such a problem, it is necessary for a conventional optical receiver module to employ a large bypass capacitor 112 in the vicinity of the n-side electrode pads 106 of the photodiode 100, when a photodiode chip 110 and an amplifier circuit (preamplifier) 111 for amplifying received signals are mounted on the module, as shown in FIG. 8.
In the optical receiver module, the chip 110 of the photodiode 100 is soldered onto a subcarrier with AuSn (silver paste), so that the metal layer on the bottom surface of the chip 110 is connected to a ground potential. The n-side electrode pads 106 of the photodiode 100 are electrically connected to the upper electrode 112a of the bypass capacitor 112 with wires 113, and the upper electrode 112a is connected to the positive potential side of a dc bias power source 115 with wires 114. The lower electrode of the bypass capacitor 112 is connected to a ground potential. The p-side electrode pad 105 is also connected to a ground potential via an input terminal 111a of the preamplifier 111.
The above semiconductor light-receiving device, however, requires a large area, because the photodiode chip 110 and the bypass capacitor 112 are arranged on the same plane in the light receiver module. Furthermore, the bypass capacitor 112 is at least a few times larger in area than the photodiode chip 110, and sometimes two or more such bypass capacitors are connected. Therefore, it is difficult to reduce the size of each conventional optical receiver module, and it is also difficult to simplify the production process.
Further, it is necessary to employ a large number of wires 113 to connect the upper electrode 112a having a large area to the n-side electrode pads 106 of the photodiode 100. With such a large number of wires 113, the inductance component (L component) becomes so large as to obstruct high-speed operations.
As the p-side electrode pad 105 of the photodiode 100 and the bottom surface (the metal layer) of the chip 110 are both connected to a ground potential, a leak path is formed between the bottom surface (the metal layer) and the n-side electrode pads 106. This causes a problem that the leak current flowing in the module suddenly increases after the mounting of the chip 110, though the chip 110 has only a low leak current.